Seminar: Active Hardware Metering for IP Protection and Security

ESCE Seminar Speaker
Professor Farinaz Koushanfar, Rice University
Title: Active Hardware Metering for IP Protection and Security
Date & Location: Friday April 21th 3:00pm-4:00pm at B & H 190

Biography:

Farinaz Koushanfar is an Assistant Professor of Electrical & Computer Engineering and Computer Science at Rice University, where she also directs the Texas Instruments DSP Leadership University Program.
Before joining Rice in 2006, she received her Ph.D. in Electrical Engineering and Computer Science and her M.A. in Statistics both from the University of California, Berkeley. Her research is focused on developing techniques for synthesis and management of customizable, adaptive, lightweight, and secure embedded systems, adaptive energy delivery, and applications of emerging technologies. Koushanfar is a recipient of an Office of Naval Research (ONR) Young Investigator Program (YIP) Award, a National Science Foundation (NSF) CAREER Award, a Defense Advanced Research Projects Agency (DARPA) Young Faculty Award, an INTEL Open Collaborative Research (OCR) Fellowship, and a Mobicom Best Paper Award. In 2008, she was named one of MIT Technology Review's young innovators under 35 (TR-35).

Abstract:

I will present novel lightweight hardware-based mechanisms for ensuring security, intellectual property (IP) protection, and trust of integrated circuits (ICs) and systems. The need for the new security methods stems from the proliferation of the fabless semiconductor business model, increase of third-party IP reuse, emergence of personal security devices, and the high overhead of traditional cryptographic protocols for embedded systems. The focus of the talk will be on active hardware metering, a first system of security mechanisms and protocols that enable the design house to gain active post-fabrication control of each produced IC, their properties and terms of use, or by run-time disabling of ICs in case of tamper detection. Active hardware metering is built upon two basic
mechanisms: (i) variability-based uniqueness of each chip, and (ii) alteration of the design structure so that the initial functionality is preserved but integrated with the unique chip properties through functional access points. Thus, not only each IC has a specific signature, but also its functionality requires a unique access code for activation. For anybody without authorization from the design house, each chip would be effectively and uniquely locked. To realize the first mechanism, we use physical unclonable functions (PUFs) that overcome the digital storage vulnerabilities. I discuss our ongoing work in security analysis, safeguarding, implementation, and fabrication of new families of PUFs, and their use in secure system design. For the second mechanism, I show how modification of the functional description is accomplished through modifying the finite state automata. Attacks and countermeasures are discussed.
Experimental evaluations of hardware metering on benchmark designs and proof-of-concept hardware implementation on H.264 demonstrate the low overhead, security, and practicality of the new techniques.

Host: Professor Sherief Reda